bindings/pinctrl/qcom%2Csm8550-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SM8550 TLMM block
10   - Abel Vesa <abel.vesa@linaro.org>
16   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20     const: qcom,sm8550-tlmm
26   interrupt-controller: true
27   "#interrupt-cells": true
28   gpio-controller: true
30   gpio-reserved-ranges:
34   gpio-line-names:
37   "#gpio-cells": true
38   gpio-ranges: true
39   wakeup-parent: true
42   "-state$":
44       - $ref: "#/$defs/qcom-sm8550-tlmm-state"
45       - patternProperties:
46           "-pins$":
47             $ref: "#/$defs/qcom-sm8550-tlmm-state"
51   qcom-sm8550-tlmm-state:
56     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
66             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
67             - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ]
114       - pins
117   - compatible
118   - reg
123   - |
124     #include <dt-bindings/interrupt-controller/arm-gic.h>
125     tlmm: pinctrl@f100000 {
126         compatible = "qcom,sm8550-tlmm";
128         gpio-controller;
129         #gpio-cells = <2>;
130         gpio-ranges = <&tlmm 0 0 211>;
131         interrupt-controller;
132         #interrupt-cells = <2>;
135         gpio-wo-state {
140         uart-w-state {
141             rx-pins {
144                 bias-pull-up;
147             tx-pins {
150                 bias-disable;