bindings/pinctrl/qcom%2Csm7150-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm7150-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Bjorn Andersson <andersson@kernel.org>
11   - Danila Tikhonov <danila@jiaxyga.com>
17   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
21     const: qcom,sm7150-tlmm
26   reg-names:
28       - const: west
29       - const: north
30       - const: south
35   interrupt-controller: true
36   "#interrupt-cells": true
37   gpio-controller: true
38   "#gpio-cells": true
39   gpio-ranges: true
40   wakeup-parent: true
42   gpio-reserved-ranges:
46   gpio-line-names:
50   "-state$":
52       - $ref: "#/$defs/qcom-sm7150-tlmm-state"
53       - patternProperties:
54           "-pins$":
55             $ref: "#/$defs/qcom-sm7150-tlmm-state"
59   qcom-sm7150-tlmm-state:
62       Pinctrl node's client devices use subnodes for desired pin configuration.
63       Client device subnodes use below standard properties.
64     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
74             - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
75             - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
107       - pins
110   - compatible
111   - reg
112   - reg-names
117   - |
118     #include <dt-bindings/interrupt-controller/arm-gic.h>
121         compatible = "qcom,sm7150-tlmm";
125         reg-names = "west", "north", "south";
127         gpio-ranges = <&tlmm 0 0 120>;
128         gpio-controller;
129         #gpio-cells = <2>;
130         interrupt-controller;
131         #interrupt-cells = <2>;
132         wakeup-parent = <&pdc>;
134         gpio-wo-state {
139         uart-w-state {
140             rx-pins {
143                 bias-pull-up;
146             tx-pins {
149                 bias-disable;