bindings/pinctrl/qcom%2Csm6375-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6375-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SM6375 TLMM block
10   - Konrad Dybcio <konrad.dybcio@somainline.org>
16   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20     const: qcom,sm6375-tlmm
28   interrupt-controller: true
29   "#interrupt-cells": true
30   gpio-controller: true
31   gpio-reserved-ranges: true
32   "#gpio-cells": true
33   gpio-ranges: true
34   wakeup-parent: true
37   - compatible
38   - reg
43   "-state$":
45       - $ref: "#/$defs/qcom-sm6375-tlmm-state"
46       - patternProperties:
47           "-pins$":
48             $ref: "#/$defs/qcom-sm6375-tlmm-state"
52   qcom-sm6375-tlmm-state:
57     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
67             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
68             - enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
114       - pins
117   - |
118     #include <dt-bindings/interrupt-controller/arm-gic.h>
120         compatible = "qcom,sm6375-tlmm";
123         gpio-controller;
124         #gpio-cells = <2>;
125         interrupt-controller;
126         #interrupt-cells = <2>;
127         gpio-ranges = <&tlmm 0 0 157>; /* GPIOs + ufs_reset */
129         gpio-wo-subnode-state {
134         uart-w-subnodes-state {
135             rx-pins {
138                 bias-pull-up;
141             tx-pins {
144                 bias-disable;