bindings/pinctrl/qcom%2Csm6125-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6125-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Qualcomm Technologies, Inc. SM6125 TLMM block
9   - Martin Botka <martin.botka@somainline.org>
12   Top Level Mode Multiplexer pin controller in Qualcomm SM6125 SoC.
15   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
19     const: qcom,sm6125-tlmm
24   reg-names:
26       - const: west
27       - const: south
28       - const: east
33   interrupt-controller: true
34   "#interrupt-cells": true
35   gpio-controller: true
36   gpio-reserved-ranges: true
37   "#gpio-cells": true
38   gpio-ranges: true
39   wakeup-parent: true
42   - compatible
43   - reg
44   - reg-names
49   "-state$":
51       - $ref: "#/$defs/qcom-sm6125-tlmm-state"
52       - patternProperties:
53           "-pins$":
54             $ref: "#/$defs/qcom-sm6125-tlmm-state"
58   qcom-sm6125-tlmm-state:
63     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
73             - pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$"
74             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
106       - pins
109   - |
110     #include <dt-bindings/interrupt-controller/arm-gic.h>
112         compatible = "qcom,sm6125-tlmm";
116         reg-names = "west", "south", "east";
118         gpio-controller;
119         gpio-ranges = <&tlmm 0 0 134>;
120         #gpio-cells = <2>;
121         interrupt-controller;
122         #interrupt-cells = <2>;
124         sdc2-off-state {
125             clk-pins {
127                 drive-strength = <2>;
128                 bias-disable;
131             cmd-pins {
133                 drive-strength = <2>;
134                 bias-pull-up;
137             data-pins {
139                 drive-strength = <2>;
140                 bias-pull-up;