Lines Matching +full:qcom +full:- +full:sc7280 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 SoC LPASS LPI TLMM
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC.
18 const: qcom,sc7280-lpass-lpi-pinctrl
23 gpio-controller: true
25 "#gpio-cells":
27 include/dt-bindings/gpio/gpio.h
30 gpio-ranges:
34 "-state$":
36 - $ref: "#/$defs/qcom-sc7280-lpass-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-sc7280-lpass-state"
43 qcom-sc7280-lpass-state:
48 $ref: /schemas/pinctrl/pincfg-node.yaml
57 - pattern: "^gpio([0-9]|1[0-4])$"
71 drive-strength:
77 slew-rate:
86 bias-pull-down: true
87 bias-pull-up: true
88 bias-bus-hold: true
89 bias-disable: true
90 output-high: true
91 output-low: true
94 - pins
95 - function
100 - compatible
101 - reg
102 - gpio-controller
103 - "#gpio-cells"
104 - gpio-ranges
109 - |
111 compatible = "qcom,sc7280-lpass-lpi-pinctrl";
114 gpio-controller;
115 #gpio-cells = <2>;
116 gpio-ranges = <&lpass_tlmm 0 0 15>;
118 dmic01-state {
119 dmic01-clk-pins {
124 dmic01-clk-sleep-pins {
130 tx-swr-data-sleep-state {