bindings/pinctrl/qcom%2Csc7180-pinctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7180-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7180 TLMM pin controller
10   - Bjorn Andersson <andersson@kernel.org>
11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14   Top Level Mode Multiplexer pin controller in Qualcomm SC7180 SoC.
18     const: qcom,sc7180-pinctrl
23   reg-names:
25       - const: west
26       - const: north
27       - const: south
32   interrupt-controller: true
33   "#interrupt-cells": true
34   gpio-controller: true
35   "#gpio-cells": true
36   gpio-ranges: true
37   wakeup-parent: true
39   gpio-reserved-ranges:
43   gpio-line-names:
47   "-state$":
49       - $ref: "#/$defs/qcom-sc7180-tlmm-state"
50       - patternProperties:
51           "-pins$":
52             $ref: "#/$defs/qcom-sc7180-tlmm-state"
56   qcom-sc7180-tlmm-state:
59       Pinctrl node's client devices use subnodes for desired pin configuration.
61     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
71             - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
72             - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
105       - pins
108   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
111   - compatible
112   - reg
113   - reg-names
118   - |
119     #include <dt-bindings/interrupt-controller/arm-gic.h>
121     tlmm: pinctrl@3500000 {
122         compatible = "qcom,sc7180-pinctrl";
126         reg-names = "west", "north", "south";
128         gpio-controller;
129         #gpio-cells = <2>;
130         interrupt-controller;
131         #interrupt-cells = <2>;
132         gpio-ranges = <&tlmm 0 0 120>;
133         wakeup-parent = <&pdc>;
135         dp_hot_plug_det: dp-hot-plug-det-state {
140         qup_spi11_cs_gpio: qup-spi11-cs-gpio-state {
141             spi-pins {
146             cs-pins {