bindings/pinctrl/qcom%2Csa8775p-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sa8775p-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SA8775P TLMM block
10   - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
16   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20     const: qcom,sa8775p-tlmm
26   interrupt-controller: true
27   "#interrupt-cells": true
28   gpio-controller: true
29   "#gpio-cells": true
30   gpio-ranges: true
32   gpio-reserved-ranges:
36   gpio-line-names:
40   - compatible
41   - reg
46   "-state$":
48       - $ref: "#/$defs/qcom-sa8775p-tlmm-state"
49       - patternProperties:
50           "-pins$":
51             $ref: "#/$defs/qcom-sa8775p-tlmm-state"
55   qcom-sa8775p-tlmm-state:
60     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
70             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-7])$"
71             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, ufs_reset ]
108       - pins
111   - |
112     #include <dt-bindings/interrupt-controller/arm-gic.h>
114     tlmm: pinctrl@f000000 {
115         compatible = "qcom,sa8775p-tlmm";
118         gpio-controller;
119         #gpio-cells = <2>;
120         interrupt-controller;
121         #interrupt-cells = <2>;
122         gpio-ranges = <&tlmm 0 0 148>;
124         qup-uart10-state {