Lines Matching +full:qcom +full:- +full:qcs404 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,qcs404-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QCS404 TLMM pin controller
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 Top Level Mode Multiplexer pin controller in Qualcomm QCS404 SoC.
18 const: qcom,qcs404-pinctrl
23 reg-names:
25 - const: south
26 - const: north
27 - const: east
32 interrupt-controller: true
33 "#interrupt-cells": true
34 gpio-controller: true
35 "#gpio-cells": true
36 gpio-ranges: true
37 wakeup-parent: true
39 gpio-reserved-ranges:
43 gpio-line-names:
47 "-state$":
49 - $ref: "#/$defs/qcom-qcs404-tlmm-state"
50 - patternProperties:
51 "-pins$":
52 $ref: "#/$defs/qcom-qcs404-tlmm-state"
56 qcom-qcs404-tlmm-state:
61 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
71 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9])$"
72 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
124 - pins
127 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
130 - compatible
131 - reg
136 - |
137 #include <dt-bindings/interrupt-controller/arm-gic.h>
139 tlmm: pinctrl@1000000 {
140 compatible = "qcom,qcs404-pinctrl";
144 reg-names = "south", "north", "east";
146 gpio-ranges = <&tlmm 0 0 120>;
147 gpio-controller;
148 #gpio-cells = <2>;
149 interrupt-controller;
150 #interrupt-cells = <2>;
153 blsp1-i2c1-default-state {
158 blsp1-i2c2-default-state {
159 sda-pins {
164 scl-pins {