bindings/pinctrl/qcom%2Cmsm8916-pinctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8916-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8916 TLMM pin controller
10   - Bjorn Andersson <andersson@kernel.org>
11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14   Top Level Mode Multiplexer pin controller in Qualcomm MSM8916 SoC.
18     const: qcom,msm8916-pinctrl
26   interrupt-controller: true
27   "#interrupt-cells": true
28   gpio-controller: true
29   "#gpio-cells": true
30   gpio-ranges: true
31   wakeup-parent: true
33   gpio-reserved-ranges:
37   gpio-line-names:
41   "-state$":
43       - $ref: "#/$defs/qcom-msm8916-tlmm-state"
44       - patternProperties:
45           "-pins$":
46             $ref: "#/$defs/qcom-msm8916-tlmm-state"
50   qcom-msm8916-tlmm-state:
53       Pinctrl node's client devices use subnodes for desired pin configuration.
55     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
65             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[01])$"
66             - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
108       - pins
111   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
114   - compatible
115   - reg
120   - |
121     #include <dt-bindings/interrupt-controller/arm-gic.h>
123     msmgpio: pinctrl@1000000 {
124         compatible = "qcom,msm8916-pinctrl";
127         gpio-controller;
128         gpio-ranges = <&msmgpio 0 0 122>;
129         #gpio-cells = <2>;
130         interrupt-controller;
131         #interrupt-cells = <2>;
133         blsp1-uart2-sleep-state {
137             drive-strength = <2>;
138             bias-pull-down;
141         spi1-default-state {
142             spi-pins {
146                 drive-strength = <12>;
147                 bias-disable;
150             cs-pins {
154                 drive-strength = <16>;
155                 bias-disable;
156                 output-high;