bindings/pinctrl/qcom%2Cmsm8660-pinctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8660-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Bjorn Andersson <andersson@kernel.org>
11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18     const: qcom,msm8660-pinctrl
26   interrupt-controller: true
27   "#interrupt-cells": true
28   gpio-controller: true
29   "#gpio-cells": true
30   gpio-ranges: true
31   wakeup-parent: true
33   gpio-reserved-ranges:
37   gpio-line-names:
41   "-state$":
43       - $ref: "#/$defs/qcom-msm8660-tlmm-state"
44       - patternProperties:
45           "-pins$":
46             $ref: "#/$defs/qcom-msm8660-tlmm-state"
50   qcom-msm8660-tlmm-state:
55     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
61           List of gpio pins affected by the properties specified in this
65             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-2])$"
66             - enum: [ sdc3_clk, sdc3_cmd, sdc3_data, sdc4_clk, sdc4_cmd, sdc4_data ]
75         enum: [ gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a,
86       - pins
89   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
92   - compatible
93   - reg
98   - |
99     #include <dt-bindings/interrupt-controller/arm-gic.h>
101         compatible = "qcom,msm8660-pinctrl";
104         gpio-controller;
105         gpio-ranges = <&tlmm 0 0 173>;
106         #gpio-cells = <2>;
108         interrupt-controller;
109         #interrupt-cells = <2>;
111         gsbi3-i2c-state {
114             drive-strength = <8>;
115             bias-disable;