bindings/pinctrl/qcom%2Cmsm8226-pinctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. MSM8226 TLMM block
10   - Bjorn Andersson <bjorn.andersson@linaro.org>
17     const: qcom,msm8226-pinctrl
20     description: Specifies the base address and size of the TLMM register space
26   interrupt-controller: true
27   "#interrupt-cells": true
28   gpio-controller: true
29   "#gpio-cells": true
30   gpio-ranges: true
32   gpio-reserved-ranges:
36   "-state$":
38       - $ref: "#/$defs/qcom-msm8226-tlmm-state"
39       - patternProperties:
40           "-pins$":
41             $ref: "#/$defs/qcom-msm8226-tlmm-state"
45   qcom-msm8226-tlmm-state:
50     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
60             - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-6])$"
61             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
76       - pins
79   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
82   - compatible
83   - reg
88   - |
89     #include <dt-bindings/interrupt-controller/arm-gic.h>
91         compatible = "qcom,msm8226-pinctrl";
94         gpio-controller;
95         #gpio-cells = <2>;
96         gpio-ranges = <&msmgpio 0 0 117>;
97         interrupt-controller;
98         #interrupt-cells = <2>;
101         serial-state {
104             drive-strength = <8>;
105             bias-disable;