Lines Matching +full:pin +full:- +full:mux

4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
19 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
22 Please refer to pinctrl-bindings.txt in this directory for details of the
24 phrase "pin configuration node".
26 Qualcomm's pin configuration nodes act as a container for an arbitrary number of
28 pin, a group, or a list of pins or groups. This configuration can include the
29 mux function to select on those pin(s)/group(s), and various pin configuration
30 parameters, such as pull-up, drive strength, etc.
36 other words, a subnode that lists a mux function but no pin configuration
37 parameters implies no information about any pin configuration parameters.
38 Similarly, a pin subnode that describes a pullup parameter implies no
39 information about e.g. the mux function.
42 The following generic properties as defined in pinctrl-bindings.txt are valid
43 to specify in a pin configuration subnode:
45 pins, function, bias-disable, bias-pull-down, bias-pull-up, drive-strength,
46 output-low, output-high.
48 Non-empty subnodes must specify the 'pins' property.
51 gpio0-gpio68
52 Supports mux, bias, and drive-strength
55 Supports bias and drive-strength
70 compatible = "qcom,ipq8064-pinctrl";
73 gpio-controller;
74 #gpio-cells = <2>;
75 gpio-ranges = <&pinmux 0 0 69>;
76 interrupt-controller;
77 #interrupt-cells = <2>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&gsbi5_uart_default>;
84 mux {
91 drive-strength = <4>;
92 bias-disable;
97 drive-strength = <2>;
98 bias-pull-up;