bindings/pinctrl/qcom%2Cipq6018-pinctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. IPQ6018 TLMM block
10   - Bjorn Andersson <andersson@kernel.org>
13   Top Level Mode Multiplexer pin controller in Qualcomm IPQ6018 SoC.
17     const: qcom,ipq6018-pinctrl
25   interrupt-controller: true
26   "#interrupt-cells": true
27   gpio-controller: true
28   "#gpio-cells": true
29   gpio-ranges: true
32   "-state$":
34       - $ref: "#/$defs/qcom-ipq6018-tlmm-state"
35       - patternProperties:
36           "-pins$":
37             $ref: "#/$defs/qcom-ipq6018-tlmm-state"
41   qcom-ipq6018-tlmm-state:
43       Pinctrl node's client devices use subnodes for desired pin configuration.
45     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
55             - pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
56             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
94       - pins
97   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
100   - compatible
101   - reg
106   - |
107     #include <dt-bindings/interrupt-controller/arm-gic.h>
108     tlmm: pinctrl@1000000 {
109         compatible = "qcom,ipq6018-pinctrl";
112         interrupt-controller;
113         #interrupt-cells = <2>;
114         gpio-controller;
115         #gpio-cells = <2>;
116         gpio-ranges = <&tlmm 0 0 80>;
118         serial3-state {
121             drive-strength = <8>;
122             bias-pull-down;