bindings/pinctrl/qcom%2Cipq5332-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5332-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm IPQ5332 TLMM pin controller
10   - Bjorn Andersson <andersson@kernel.org>
11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
17   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
21     const: qcom,ipq5332-tlmm
29   interrupt-controller: true
30   "#interrupt-cells": true
31   gpio-controller: true
32   "#gpio-cells": true
33   gpio-ranges: true
34   wakeup-parent: true
36   gpio-reserved-ranges:
40   gpio-line-names:
44   "-state$":
46       - $ref: "#/$defs/qcom-ipq5332-tlmm-state"
47       - patternProperties:
48           "-pins$":
49             $ref: "#/$defs/qcom-ipq5332-tlmm-state"
53   qcom-ipq5332-tlmm-state:
58     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
67           pattern: "^gpio([0-9]|[1-4][0-9]|5[0-2])$"
97       - pins
100   - compatible
101   - reg
106   - |
107     #include <dt-bindings/interrupt-controller/arm-gic.h>
109     tlmm: pinctrl@1000000 {
110         compatible = "qcom,ipq5332-tlmm";
112         gpio-controller;
113         #gpio-cells = <0x2>;
114         gpio-ranges = <&tlmm 0 0 53>;
116         interrupt-controller;
117         #interrupt-cells = <0x2>;
119         serial0-state {
122             drive-strength = <8>;
123             bias-pull-up;