bindings/pinctrl/qcom%2Cipq5018-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Bjorn Andersson <andersson@kernel.org>
11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18     const: qcom,ipq5018-tlmm
26   interrupt-controller: true
27   "#interrupt-cells": true
28   gpio-controller: true
29   "#gpio-cells": true
30   gpio-ranges: true
31   wakeup-parent: true
33   gpio-reserved-ranges:
37   gpio-line-names:
41   "-state$":
43       - $ref: "#/$defs/qcom-ipq5018-tlmm-state"
44       - patternProperties:
45           "-pins$":
46             $ref: "#/$defs/qcom-ipq5018-tlmm-state"
50   qcom-ipq5018-tlmm-state:
53       Pinctrl node's client devices use subnodes for desired pin configuration.
54       Client device subnodes use below standard properties.
55     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
64           pattern: "^gpio([0-9]|[1-3][0-9]|4[0-6])$"
92       - pins
95   - compatible
96   - reg
101   - |
102     #include <dt-bindings/interrupt-controller/arm-gic.h>
104         compatible = "qcom,ipq5018-tlmm";
106         gpio-controller;
107         #gpio-cells = <2>;
108         gpio-ranges = <&tlmm 0 0 47>;
109         interrupt-controller;
110         #interrupt-cells = <2>;
113         uart-w-state {
114             rx-pins {
117                 bias-pull-down;
120             tx-pins {
123                 bias-pull-down;