Lines Matching +full:am654 +full:- +full:gpio

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
21 - enum:
22 - pinctrl-single
23 - pinconf-single
24 - items:
25 - enum:
26 - ti,am437-padconf
27 - ti,am654-padconf
28 - ti,dra7-padconf
29 - ti,omap2420-padconf
30 - ti,omap2430-padconf
31 - ti,omap3-padconf
32 - ti,omap4-padconf
33 - ti,omap5-padconf
34 - const: pinctrl-single
39 interrupt-controller: true
41 '#interrupt-cells':
44 '#address-cells':
47 '#size-cells':
50 '#pinctrl-cells':
56 pinctrl-single,bit-per-mux:
60 pinctrl-single,function-mask:
64 pinctrl-single,function-off:
68 pinctrl-single,register-width:
73 pinctrl-single,gpio-range:
74 description: Optional list of pin base, nr pins & gpio function
75 $ref: /schemas/types.yaml#/definitions/phandle-array
77 - items:
78 - description: phandle of a gpio-range node
79 - description: pin base
80 - description: number of pins
81 - description: gpio function
83 '#gpio-range-cells':
84 description: No longer needed, may exist in older files for gpio-ranges
88 gpio-range:
89 description: Optional node for gpio range cells
93 '#pinctrl-single,gpio-range-cells':
94 description: Number of gpio range cells
99 '-pins(-[0-9]+)?$|-pin$':
101 Pin group node name using naming ending in -pins followed by an optional
107 pinctrl-single,pins:
109 Array of pins as described in pinmux-node.yaml for pinctrl-pin-array
110 $ref: /schemas/types.yaml#/definitions/uint32-array
112 pinctrl-single,bits:
113 description: Register bit configuration for pinctrl-single,bit-per-mux
114 $ref: /schemas/types.yaml#/definitions/uint32-array
116 - description: register offset
117 - description: value
118 - description: pin bitmask in the register
120 pinctrl-single,bias-pullup:
122 $ref: /schemas/types.yaml#/definitions/uint32-array
124 - description: input
125 - description: enabled pull up bits
126 - description: disabled pull up bits
127 - description: bias pull up mask
129 pinctrl-single,bias-pulldown:
131 $ref: /schemas/types.yaml#/definitions/uint32-array
133 - description: input
134 - description: enabled pull down bits
135 - description: disabled pull down bits
136 - description: bias pull down mask
138 pinctrl-single,drive-strength:
140 $ref: /schemas/types.yaml#/definitions/uint32-array
142 - description: drive strength current
143 - description: drive strength mask
145 pinctrl-single,input-schmitt:
147 $ref: /schemas/types.yaml#/definitions/uint32-array
149 - description: input
150 - description: enable bits
151 - description: disable bits
152 - description: input schmitt mask
154 pinctrl-single,low-power-mode:
156 $ref: /schemas/types.yaml#/definitions/uint32-array
158 - description: low power mode value
159 - description: low power mode mask
161 pinctrl-single,slew-rate:
163 $ref: /schemas/types.yaml#/definitions/uint32-array
165 - description: slew rate
166 - description: slew rate mask
169 - $ref: pinctrl.yaml#
172 - compatible
173 - reg
174 - pinctrl-single,register-width
179 - |
181 #address-cells = <1>;
182 #size-cells = <1>;
185 compatible = "pinctrl-single";
187 #address-cells = <1>;
188 #size-cells = <0>;
189 #pinctrl-cells = <2>;
190 #interrupt-cells = <1>;
191 interrupt-controller;
192 pinctrl-single,register-width = <16>;
193 pinctrl-single,function-mask = <0xffff>;
194 pinctrl-single,gpio-range = <&range 0 3 0>;
195 range: gpio-range {
196 #pinctrl-single,gpio-range-cells = <3>;
199 uart2-pins {
200 pinctrl-single,pins =