Lines Matching +full:part +full:- +full:1 +full:- +full:pins
10 Please refer to pinctrl-bindings.txt in this directory for details of the
14 Freescale IMX pin configuration node is a node of a group of pins which can be
16 of the pins in that group. The 'mux' selects the function mode(also named mux
18 such as pull-up, open drain, drive strength, etc.
21 - compatible: "fsl,<soc>-iomuxc"
22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
28 imx*-pinfunc.h under device tree source folder. The last integer CONFIG is
29 the pad setting value like pull-up on this pin. And that's why fsl,pins entry
33 NO_PAD_CTL(1 << 31): indicate this pin does not need config.
35 SION(1 << 30): Software Input On Field.
41 Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
45 Some requirements for using fsl,imx-pinctrl binding:
46 1. We have pin function node defined under iomux controller node to represent
51 this group of pins in this pin configuration node are working on.
57 4. Each pin configuration node should have a phandle, devices can set pins
62 non-removable;
63 vmmc-supply = <®_3p3v>;
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_usdhc4_1>;
69 compatible = "fsl,imx6q-iomuxc";
74 pinctrl_usdhc4_1: usdhc4grp-1 {
75 fsl,pins = <