bindings/phy/qcom%2Csnps-eusb2-phy.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Abel Vesa <abel.vesa@linaro.org>
17     const: qcom,sm8550-snps-eusb2-phy
22   "#phy-cells":
27       - description: ref
29   clock-names:
31       - const: ref
41   vdd-supply:
43       Phandle to 0.88V regulator supply to PHY digital circuit.
45   vdda12-supply:
47       Phandle to 1.2V regulator supply to PHY refclk pll block.
50   - compatible
51   - reg
52   - "#phy-cells"
53   - clocks
54   - clock-names
55   - vdd-supply
56   - vdda12-supply
57   - resets
62   - |
63     #include <dt-bindings/clock/qcom,sm8550-gcc.h>
64     #include <dt-bindings/clock/qcom,rpmh.h>
65     #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
68         compatible = "qcom,sm8550-snps-eusb2-phy";
70         #phy-cells = <0>;
73         clock-names = "ref";
75         vdd-supply = <&vreg_l1e_0p88>;
76         vdda12-supply = <&vreg_l3e_1p2>;