bindings/phy/qcom%2Csc8280xp-qmp-usb3-uni-phy.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (USB, SC8280XP)
10   - Vinod Koul <vkoul@kernel.org>
13   The QMP PHY controller supports physical layer functionality for a number of
14   controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
19       - qcom,ipq9574-qmp-usb3-phy
20       - qcom,qcm2290-qmp-usb3-phy
21       - qcom,sa8775p-qmp-usb3-uni-phy
22       - qcom,sc8280xp-qmp-usb3-uni-phy
23       - qcom,sm6115-qmp-usb3-phy
31   clock-names:
34   power-domains:
40   reset-names:
42       - const: phy
43       - const: phy_phy
45   vdda-phy-supply: true
47   vdda-pll-supply: true
49   "#clock-cells":
52   clock-output-names:
55   "#phy-cells":
59   - compatible
60   - reg
61   - clocks
62   - clock-names
63   - resets
64   - reset-names
65   - vdda-phy-supply
66   - vdda-pll-supply
67   - "#clock-cells"
68   - clock-output-names
69   - "#phy-cells"
72   - if:
77               - qcom,ipq9574-qmp-usb3-phy
80         clock-names:
82             - const: aux
83             - const: ref
84             - const: cfg_ahb
85             - const: pipe
87   - if:
92               - qcom,qcm2290-qmp-usb3-phy
93               - qcom,sm6115-qmp-usb3-phy
98         clock-names:
100             - const: cfg_ahb
101             - const: ref
102             - const: com_aux
103             - const: pipe
105   - if:
110               - qcom,sa8775p-qmp-usb3-uni-phy
111               - qcom,sc8280xp-qmp-usb3-uni-phy
116         clock-names:
118             - const: aux
119             - const: ref
120             - const: com_aux
121             - const: pipe
123         - power-domains
128   - |
129     #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
130     #include <dt-bindings/clock/qcom,rpmh.h>
132     phy@88ef000 {
133       compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";
140       clock-names = "aux", "ref", "com_aux", "pipe";
142       power-domains = <&gcc USB30_MP_GDSC>;
146       reset-names = "phy", "phy_phy";
148       vdda-phy-supply = <&vreg_l3a>;
149       vdda-pll-supply = <&vreg_l5a>;
151       #clock-cells = <0>;
152       clock-output-names = "usb2_phy0_pipe_clk";
154       #phy-cells = <0>;