Lines Matching +full:msm8996 +full:- +full:qfprom
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
16 In certain Qualcomm Technologies, Inc. SoCs like APQ8096 and MSM8996,
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
29 const: operating-points-v2-kryo-cpu
31 nvmem-cells:
33 A phandle pointing to a nvmem-cells node representing the
38 opp-shared: true
41 '^opp-?[0-9]+$':
46 opp-hz: true
48 opp-microvolt: true
50 opp-supported-hw:
53 Bitmap for MSM8996 format:
54 0: MSM8996, speedbin 0
55 1: MSM8996, speedbin 1
56 2: MSM8996, speedbin 2
57 3: MSM8996, speedbin 3
58 4-31: unused
61 0-3: unused
65 7-31: unused
70 clock-latency-ns: true
72 required-opps: true
75 - opp-hz
78 - compatible
82 - nvmem-cells
85 '^opp-?[0-9]+$':
87 - opp-supported-hw
92 - |
95 compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc", "qcom,apq8096";
96 #address-cells = <2>;
97 #size-cells = <2>;
100 #address-cells = <2>;
101 #size-cells = <0>;
107 enable-method = "psci";
108 cpu-idle-states = <&CPU_SLEEP_0>;
109 capacity-dmips-mhz = <1024>;
111 operating-points-v2 = <&cluster0_opp>;
112 power-domains = <&cpr>;
113 power-domain-names = "cpr";
114 #cooling-cells = <2>;
115 next-level-cache = <&L2_0>;
116 L2_0: l2-cache {
118 cache-level = <2>;
119 cache-unified;
127 enable-method = "psci";
128 cpu-idle-states = <&CPU_SLEEP_0>;
129 capacity-dmips-mhz = <1024>;
131 operating-points-v2 = <&cluster0_opp>;
132 power-domains = <&cpr>;
133 power-domain-names = "cpr";
134 #cooling-cells = <2>;
135 next-level-cache = <&L2_0>;
142 enable-method = "psci";
143 cpu-idle-states = <&CPU_SLEEP_0>;
144 capacity-dmips-mhz = <1024>;
146 operating-points-v2 = <&cluster1_opp>;
147 power-domains = <&cpr>;
148 power-domain-names = "cpr";
149 #cooling-cells = <2>;
150 next-level-cache = <&L2_1>;
151 L2_1: l2-cache {
153 cache-level = <2>;
154 cache-unified;
162 enable-method = "psci";
163 cpu-idle-states = <&CPU_SLEEP_0>;
164 capacity-dmips-mhz = <1024>;
166 operating-points-v2 = <&cluster1_opp>;
167 power-domains = <&cpr>;
168 power-domain-names = "cpr";
169 #cooling-cells = <2>;
170 next-level-cache = <&L2_1>;
173 cpu-map {
196 cluster0_opp: opp-table-0 {
197 compatible = "operating-points-v2-kryo-cpu";
198 nvmem-cells = <&speedbin_efuse>;
199 opp-shared;
201 opp-307200000 {
202 opp-hz = /bits/ 64 <307200000>;
203 opp-microvolt = <905000 905000 1140000>;
204 opp-supported-hw = <0x7>;
205 clock-latency-ns = <200000>;
206 required-opps = <&cpr_opp1>;
208 opp-1401600000 {
209 opp-hz = /bits/ 64 <1401600000>;
210 opp-microvolt = <1140000 905000 1140000>;
211 opp-supported-hw = <0x5>;
212 clock-latency-ns = <200000>;
213 required-opps = <&cpr_opp2>;
215 opp-1593600000 {
216 opp-hz = /bits/ 64 <1593600000>;
217 opp-microvolt = <1140000 905000 1140000>;
218 opp-supported-hw = <0x1>;
219 clock-latency-ns = <200000>;
220 required-opps = <&cpr_opp3>;
224 cluster1_opp: opp-table-1 {
225 compatible = "operating-points-v2-kryo-cpu";
226 nvmem-cells = <&speedbin_efuse>;
227 opp-shared;
229 opp-307200000 {
230 opp-hz = /bits/ 64 <307200000>;
231 opp-microvolt = <905000 905000 1140000>;
232 opp-supported-hw = <0x7>;
233 clock-latency-ns = <200000>;
234 required-opps = <&cpr_opp1>;
236 opp-1804800000 {
237 opp-hz = /bits/ 64 <1804800000>;
238 opp-microvolt = <1140000 905000 1140000>;
239 opp-supported-hw = <0x6>;
240 clock-latency-ns = <200000>;
241 required-opps = <&cpr_opp4>;
243 opp-1900800000 {
244 opp-hz = /bits/ 64 <1900800000>;
245 opp-microvolt = <1140000 905000 1140000>;
246 opp-supported-hw = <0x4>;
247 clock-latency-ns = <200000>;
248 required-opps = <&cpr_opp5>;
250 opp-2150400000 {
251 opp-hz = /bits/ 64 <2150400000>;
252 opp-microvolt = <1140000 905000 1140000>;
253 opp-supported-hw = <0x1>;
254 clock-latency-ns = <200000>;
255 required-opps = <&cpr_opp6>;
261 memory-region = <&smem_mem>;
266 #address-cells = <1>;
267 #size-cells = <1>;
269 qfprom: qfprom@74000 {
270 compatible = "qcom,msm8996-qfprom", "qcom,qfprom";
272 #address-cells = <1>;
273 #size-cells = <1>;