Lines Matching +full:rx +full:- +full:delay +full:- +full:ps
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,etheravb-r8a7742 # RZ/G1H
18 - renesas,etheravb-r8a7743 # RZ/G1M
19 - renesas,etheravb-r8a7744 # RZ/G1N
20 - renesas,etheravb-r8a7745 # RZ/G1E
21 - renesas,etheravb-r8a77470 # RZ/G1C
22 - renesas,etheravb-r8a7790 # R-Car H2
23 - renesas,etheravb-r8a7791 # R-Car M2-W
24 - renesas,etheravb-r8a7792 # R-Car V2H
25 - renesas,etheravb-r8a7793 # R-Car M2-N
26 - renesas,etheravb-r8a7794 # R-Car E2
27 - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1
29 - items:
30 - enum:
31 - renesas,etheravb-r8a774a1 # RZ/G2M
32 - renesas,etheravb-r8a774b1 # RZ/G2N
33 - renesas,etheravb-r8a774c0 # RZ/G2E
34 - renesas,etheravb-r8a774e1 # RZ/G2H
35 - renesas,etheravb-r8a7795 # R-Car H3
36 - renesas,etheravb-r8a7796 # R-Car M3-W
37 - renesas,etheravb-r8a77961 # R-Car M3-W+
38 - renesas,etheravb-r8a77965 # R-Car M3-N
39 - renesas,etheravb-r8a77970 # R-Car V3M
40 - renesas,etheravb-r8a77980 # R-Car V3H
41 - renesas,etheravb-r8a77990 # R-Car E3
42 - renesas,etheravb-r8a77995 # R-Car D3
43 - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2
45 - items:
46 - enum:
47 - renesas,etheravb-r8a779a0 # R-Car V3U
48 - renesas,etheravb-r8a779g0 # R-Car V4H
49 - const: renesas,etheravb-rcar-gen4 # R-Car Gen4
51 - items:
52 - enum:
53 - renesas,etheravb-r9a09g011 # RZ/V2M
54 - const: renesas,etheravb-rzv2m # RZ/V2M compatible
56 - items:
57 - enum:
58 - renesas,r9a07g043-gbeth # RZ/G2UL
59 - renesas,r9a07g044-gbeth # RZ/G2{L,LC}
60 - renesas,r9a07g054-gbeth # RZ/V2L
61 - const: renesas,rzg2l-gbeth # RZ/{G2L,G2UL,V2L} family
67 interrupt-names: true
71 clock-names: true
76 power-domains:
82 phy-mode: true
84 phy-handle: true
86 '#address-cells':
90 '#size-cells':
94 renesas,no-ether-link:
99 renesas,ether-link-active-low:
102 Specify when the AVB_LINK signal is active-low instead of normal
103 active-high.
105 rx-internal-delay-ps:
108 tx-internal-delay-ps:
112 "^ethernet-phy@[0-9a-f]$":
114 $ref: ethernet-phy.yaml#
117 - compatible
118 - reg
119 - interrupts
120 - clocks
121 - power-domains
122 - resets
123 - phy-mode
124 - phy-handle
125 - '#address-cells'
126 - '#size-cells'
129 - $ref: ethernet-controller.yaml#
131 - if:
136 - renesas,etheravb-rcar-gen2
137 - renesas,etheravb-r8a7795
138 - renesas,etheravb-r8a7796
139 - renesas,etheravb-r8a77961
140 - renesas,etheravb-r8a77965
145 - description: MAC register block
146 - description: Stream buffer
151 - description: MAC register block
153 - if:
158 - renesas,etheravb-rcar-gen2
159 - renesas,rzg2l-gbeth
165 interrupt-names:
168 - const: mux
169 - const: fil
170 - const: arp_ns
171 rx-internal-delay-ps: false
177 const: renesas,etheravb-rzv2m
183 interrupt-names:
185 pattern: '^(ch(1?)[0-9])|ch20|ch21|dia|dib|err_a|err_b|mgmt_a|mgmt_b|line3$'
186 rx-internal-delay-ps: false
188 - interrupt-names
194 interrupt-names:
196 pattern: '^ch[0-9]+$'
198 - interrupt-names
199 - rx-internal-delay-ps
201 - if:
206 - renesas,etheravb-r8a774a1
207 - renesas,etheravb-r8a774b1
208 - renesas,etheravb-r8a774e1
209 - renesas,etheravb-r8a7795
210 - renesas,etheravb-r8a7796
211 - renesas,etheravb-r8a77961
212 - renesas,etheravb-r8a77965
213 - renesas,etheravb-r8a77970
214 - renesas,etheravb-r8a77980
215 - renesas,etheravb-rcar-gen4
218 - tx-internal-delay-ps
221 tx-internal-delay-ps: false
223 - if:
227 const: renesas,etheravb-r8a77995
230 rx-internal-delay-ps:
233 - if:
237 const: renesas,etheravb-r8a77980
240 tx-internal-delay-ps:
243 - if:
247 const: renesas,rzg2l-gbeth
252 - description: Main clock
253 - description: Register access clock
254 - description: Reference clock for RGMII
255 clock-names:
257 - const: axi
258 - const: chi
259 - const: refclk
265 const: renesas,etheravb-rzv2m
270 - description: Main clock
271 - description: Coherent Hub Interface clock
272 - description: gPTP reference clock
273 clock-names:
275 - const: axi
276 - const: chi
277 - const: gptp
283 - description: AVB functional clock
284 - description: Optional TXC reference clock
285 clock-names:
288 - const: fck
289 - const: refclk
294 - |
295 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
296 #include <dt-bindings/interrupt-controller/arm-gic.h>
297 #include <dt-bindings/power/r8a7795-sysc.h>
298 #include <dt-bindings/gpio/gpio.h>
304 compatible = "renesas,etheravb-r8a7795",
305 "renesas,etheravb-rcar-gen3";
332 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6",
337 clock-names = "fck";
339 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
341 phy-mode = "rgmii";
342 phy-handle = <&phy0>;
343 rx-internal-delay-ps = <0>;
344 tx-internal-delay-ps = <2000>;
345 #address-cells = <1>;
346 #size-cells = <0>;
348 phy0: ethernet-phy@0 {
349 compatible = "ethernet-phy-id0022.1622",
350 "ethernet-phy-ieee802.3-c22";
351 rxc-skew-ps = <1500>;
353 interrupt-parent = <&gpio2>;
355 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;