Lines Matching +full:ethernet +full:- +full:phy

1 Hisilicon hip04 Ethernet Controller
3 * Ethernet controller node
6 - compatible: should be "hisilicon,hip04-mac".
7 - reg: address and length of the register set for the device.
8 - interrupts: interrupt for the device.
9 - port-handle: <phandle port channel>
14 - phy-mode: see ethernet.txt [1].
17 - phy-handle: see ethernet.txt [1].
19 [1] Documentation/devicetree/bindings/net/ethernet.txt
22 * Ethernet ppe node:
23 Control rx & tx fifos of all ethernet controllers.
24 Have 2048 recv channels shared by all ethernet controllers, only if no overlap.
28 - compatible: "hisilicon,hip04-ppe", "syscon".
29 - reg: address and length of the register set for the device.
36 - compatible: should be "hisilicon,mdio".
37 - Inherits from MDIO bus node binding [2]
38 [2] Documentation/devicetree/bindings/net/phy.txt
44 #address-cells = <1>;
45 #size-cells = <0>;
47 phy0: ethernet-phy@0 {
48 compatible = "ethernet-phy-ieee802.3-c22";
50 marvell,reg-init = <18 0x14 0 0x8001>;
53 phy1: ethernet-phy@1 {
54 compatible = "ethernet-phy-ieee802.3-c22";
56 marvell,reg-init = <18 0x14 0 0x8001>;
61 compatible = "hisilicon,hip04-ppe", "syscon";
65 fe: ethernet@28b0000 {
66 compatible = "hisilicon,hip04-mac";
69 phy-mode = "mii";
70 port-handle = <&ppe 31 0 31>;
73 ge0: ethernet@2800000 {
74 compatible = "hisilicon,hip04-mac";
77 phy-mode = "sgmii";
78 port-handle = <&ppe 0 1 0>;
79 phy-handle = <&phy0>;
82 ge8: ethernet@2880000 {
83 compatible = "hisilicon,hip04-mac";
86 phy-mode = "sgmii";
87 port-handle = <&ppe 8 2 8>;
88 phy-handle = <&phy1>;