Lines Matching +full:pico +full:- +full:seconds
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
20 local-mac-address:
23 $ref: /schemas/types.yaml#/definitions/uint8-array
27 mac-address:
32 local-mac-address property.
33 $ref: /schemas/types.yaml#/definitions/uint8-array
37 max-frame-size:
44 max-speed:
49 nvmem-cells:
54 nvmem-cell-names:
55 const: mac-address
57 phy-connection-type:
65 - internal
66 - mii
67 - gmii
68 - sgmii
69 - psgmii
70 - qsgmii
71 - qusgmii
72 - tbi
73 - rev-mii
74 - rmii
75 - rev-rmii
76 - moca
79 - rgmii
83 - rgmii-id
87 - rgmii-rxid
91 - rgmii-txid
92 - rtbi
93 - smii
94 - xgmii
95 - trgmii
96 - 1000base-x
97 - 2500base-x
98 - 5gbase-r
99 - rxaui
100 - xaui
102 # 10GBASE-KR, XFI, SFI
103 - 10gbase-kr
104 - usxgmii
105 - 10gbase-r
106 - 25gbase-r
108 phy-mode:
109 $ref: "#/properties/phy-connection-type"
111 pcs-handle:
112 $ref: /schemas/types.yaml#/definitions/phandle-array
117 bus to link with an external PHY (phy-handle) if exists.
119 pcs-handle-names:
121 The name of each PCS in pcs-handle.
123 phy-handle:
129 $ref: "#/properties/phy-handle"
132 phy-device:
133 $ref: "#/properties/phy-handle"
136 rx-fifo-depth:
149 tx-fifo-depth:
157 Specifies the PHY management type. If auto is set and fixed-link
162 - auto
163 - in-band-status
165 fixed-link:
167 - $ref: /schemas/types.yaml#/definitions/uint32-array
170 - minimum: 0
174 specified fixed-links
176 - enum: [0, 1]
181 - enum: [10, 100, 1000, 2500, 10000]
185 - enum: [0, 1]
189 - enum: [0, 1]
193 - type: object
202 full-duplex:
205 Indicates that full-duplex is used. When absent, half
213 asym-pause:
218 link-gpios:
224 - speed
236 '#address-cells':
239 '#size-cells':
243 '^led@[a-f0-9]+$':
255 - reg
262 pcs-handle-names: [pcs-handle]
265 - if:
267 phy-mode:
270 - rgmii
271 - rgmii-rxid
272 - rgmii-txid
273 - rgmii-id
276 rx-internal-delay-ps:
278 RGMII Receive Clock Delay defined in pico seconds.This is used for
281 tx-internal-delay-ps:
283 RGMII Transmit Clock Delay defined in pico seconds.This is used for