Lines Matching +full:tx +full:- +full:delay +full:- +full:ns
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
12 cs_sck_delay of 500ns. Ensuring that this SPI timing requirement is observed
16 - Vladimir Oltean <vladimir.oltean@nxp.com>
21 - nxp,sja1105e
22 - nxp,sja1105t
23 - nxp,sja1105p
24 - nxp,sja1105q
25 - nxp,sja1105r
26 - nxp,sja1105s
27 - nxp,sja1110a
28 - nxp,sja1110b
29 - nxp,sja1110c
30 - nxp,sja1110d
35 spi-cpha: true
36 spi-cpol: true
39 # (one for the internal 100base-T1 PHYs and the other for the single
40 # 100base-TX PHY). The "reg" property does not have physical significance.
41 # The PHY addresses to port correspondence is as follows: for 100base-T1,
42 # port 5 has PHY 1, port 6 has PHY 2 etc, while for 100base-TX, port 1 has
48 '#address-cells':
50 '#size-cells':
54 "^mdio@[0-1]$":
61 - enum:
62 - nxp,sja1110-base-t1-mdio
63 - nxp,sja1110-base-tx-mdio
67 - enum:
68 - 0
69 - 1
72 - compatible
73 - reg
76 "^(ethernet-)?ports$":
78 "^(ethernet-)?port@[0-9]+$":
80 - if:
82 phy-mode:
85 - rgmii
86 - rgmii-rxid
87 - rgmii-txid
88 - rgmii-id
91 rx-internal-delay-ps:
92 $ref: "#/$defs/internal-delay-ps"
93 tx-internal-delay-ps:
94 $ref: "#/$defs/internal-delay-ps"
97 - compatible
98 - reg
101 internal-delay-ps:
103 Disable tunable delay lines using 0 ps, or enable them and select
112 - $ref: dsa.yaml#/$defs/ethernet-ports
113 - $ref: /schemas/spi/spi-peripheral-props.yaml#
114 - if:
118 - nxp,sja1105e
119 - nxp,sja1105p
120 - nxp,sja1105q
121 - nxp,sja1105r
122 - nxp,sja1105s
123 - nxp,sja1105t
126 spi-cpol: false
128 - spi-cpha
131 spi-cpha: false
133 - spi-cpol
138 - |
140 #address-cells = <1>;
141 #size-cells = <0>;
143 ethernet-switch@1 {
146 spi-cpha;
148 ethernet-ports {
149 #address-cells = <1>;
150 #size-cells = <0>;
153 phy-handle = <&rgmii_phy6>;
154 phy-mode = "rgmii-id";
155 rx-internal-delay-ps = <0>;
156 tx-internal-delay-ps = <0>;
161 phy-handle = <&rgmii_phy3>;
162 phy-mode = "rgmii-id";
163 rx-internal-delay-ps = <0>;
164 tx-internal-delay-ps = <0>;
169 phy-handle = <&rgmii_phy4>;
170 phy-mode = "rgmii-id";
171 rx-internal-delay-ps = <0>;
172 tx-internal-delay-ps = <0>;
177 phy-handle = <&rgmii_phy4>;
178 phy-mode = "rgmii-id";
179 rx-internal-delay-ps = <0>;
180 tx-internal-delay-ps = <0>;
186 phy-mode = "rgmii";
187 rx-internal-delay-ps = <0>;
188 tx-internal-delay-ps = <0>;
191 fixed-link {
193 full-duplex;