bindings/mtd/raw-nand-chip.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Raw NAND Chip Common Properties
10   - Miquel Raynal <miquel.raynal@bootlin.com>
13   - $ref: nand-chip.yaml#
19   {size} bytes for a particular raw NAND chip.
21   The interpretation of these parameters is implementation-defined, so
28     pattern: "^nand@[a-f0-9]$"
32       Contains the chip-select IDs.
34   nand-ecc-placement:
44   nand-ecc-mode:
49     enum: [none, soft, soft_bch, hw, hw_syndrome, on-die]
52   nand-bus-width:
54       Bus width to the NAND chip
59   nand-on-flash-bbt:
62       Block Table (BBT). If not found, it will create one, reserve
64       it as the device ages. Otherwise, the out-of-band area of a
67       build a volatile BBT in RAM.
70   nand-ecc-maximize:
77       only the in-band area is used by the upper layers, and you
78       want to make your NAND as reliable as possible.
81   nand-is-boot-medium:
83       Whether or not the NAND chip is a boot medium. Drivers might
88   nand-rb:
91     $ref: /schemas/types.yaml#/definitions/uint32-array
93   rb-gpios:
96       depends on the number of R/B pins exposed by the flash) for the
97       Ready/Busy pins. Active state refers to the NAND ready state and
100   wp-gpios:
103       Active state refers to the NAND Write Protect state and should be
108   - reg