Lines Matching refs:value

49       The divider value for the card interface unit (ciu) clock.
54       - description: CIU clock phase shift value for tx mode
57       - description: CIU clock phase shift value for rx mode
61       The value of CUI clock phase shift value in transmit mode and CIU clock
62       phase shift value in receive mode for double data rate mode operation.
68       - description: CIU clock phase shift value for tx mode
71       - description: CIU clock phase shift value for rx mode
75       The value of CIU TX and RX clock phase shift value for HS400 mode
78         - valid value for tx phase shift and rx phase shift is 0 to 7.
79         - when CIU clock divider value is set to 3, all possible 8 phase shift
81         - if CIU clock divider value is 0 (that is divide by 1), both tx and rx
88       - description: CIU clock phase shift value for tx mode
91       - description: CIU clock phase shift value for rx mode
95       The value of CIU clock phase shift value in transmit mode and CIU clock
96       phase shift value in receive mode for single data rate mode operation.
102       RCLK (Data strobe) delay to control HS400 mode (Latency value for delay