Lines Matching +full:0 +full:x14015

79   pinctrl-0:
98     minimum: 0
99     maximum: 0xffffffff
106       The value is an integer from 0 to 31.
107     minimum: 0
115       The value is an integer from 0 to 31.
116     minimum: 0
130       pad macro, there are 32 stages from 0 to 31.
135     minimum: 0
142       data crc error caused by stop clock(fifo full) Valid range = [0:0x7].
143       if not present, default value is 0.
145     minimum: 0
161   - pinctrl-0
314         reg = <0x11230000 0x1000>;
322         pinctrl-0 = <&mmc0_pins_default>;
326         hs400-ds-delay = <0x14015>;
334         reg = <0x11260000 0x1000>;
339         interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_LOW 0>,
342         pinctrl-0 = <&mmc2_pins_default>;