Lines Matching full:nanoseconds

86       defined in nanoseconds from NBLx low to Chip Select NEx low.
90       phase in nanoseconds used for asynchronous read/write transactions.
94       phase in nanoseconds used for asynchronous multiplexed read/write
99       in nanoseconds used for asynchronous read/write transactions.
102     description: This property defines the delay in nanoseconds between the
107       in nanoseconds used for asynchronous read/write transactions.
111       nanoseconds.
115       writing the first data in nanoseconds.
119       phase in nanoseconds used for asynchronous write transactions.
123       phase in nanoseconds used for asynchronous multiplexed write
128       phase in nanoseconds used for asynchronous write transactions.
132       write transaction and the next transaction in nanoseconds.
136       in nanoseconds used for asynchronous write transactions.
140       duration in nanoseconds for synchronous transactions. When this timing