bindings/memory-controllers/ingenic%2Cnemc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs NAND / External Memory Controller (NEMC)
10   - Paul Cercueil <paul@crapouillou.net>
14     pattern: "^memory-controller@[0-9a-f]+$"
18       - enum:
19           - ingenic,jz4740-nemc
20           - ingenic,jz4780-nemc
21       - items:
22           - const: ingenic,jz4725b-nemc
23           - const: ingenic,jz4740-nemc
25   "#address-cells":
28   "#size-cells":
40   ".*@[0-9]+$":
42     $ref: mc-peripheral-props.yaml#
45   - compatible
46   - "#address-cells"
47   - "#size-cells"
48   - ranges
49   - reg
50   - clocks
55   - |
56     #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
57     #include <dt-bindings/gpio/gpio.h>
58     nemc: memory-controller@13410000 {
59       compatible = "ingenic,jz4780-nemc";
61       #address-cells = <2>;
62       #size-cells = <1>;
74         davicom,no-eeprom;
76         pinctrl-names = "default";
77         pinctrl-0 = <&pins_nemc_cs6>;
82         ingenic,nemc-tAS = <15>;
83         ingenic,nemc-tAH = <10>;
84         ingenic,nemc-tBP = <20>;
85         ingenic,nemc-tAW = <50>;
86         ingenic,nemc-tSTRV = <100>;
88         reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
89         vcc-supply = <&eth0_power>;
91         interrupt-parent = <&gpe>;