Lines Matching +full:video +full:- +full:receiver

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L
15 (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction
16 with the Image Processing module, which provides the video capture capabilities.
21 - enum:
22 - renesas,r9a07g044-csi2 # RZ/G2{L,LC}
23 - renesas,r9a07g054-csi2 # RZ/V2L
24 - const: renesas,rzg2l-csi2
34 - description: Internal clock for connecting CRU and MIPI
35 - description: CRU Main clock
36 - description: CRU Register access clock
38 clock-names:
40 - const: system
41 - const: video
42 - const: apb
44 power-domains:
49 - description: CRU_PRESETN reset terminal
50 - description: CRU_CMN_RSTB reset terminal
52 reset-names:
54 - const: presetn
55 - const: cmn-rstb
62 $ref: /schemas/graph.yaml#/$defs/port-base
65 Input port node, single endpoint describing the CSI-2 transmitter.
69 $ref: video-interfaces.yaml#
73 data-lanes:
80 - clock-lanes
81 - data-lanes
86 Output port node, Image Processing block connected to the CSI-2 receiver.
89 - port@0
90 - port@1
93 - compatible
94 - reg
95 - interrupts
96 - clocks
97 - clock-names
98 - power-domains
99 - resets
100 - reset-names
101 - ports
106 - |
107 #include <dt-bindings/clock/r9a07g044-cpg.h>
108 #include <dt-bindings/interrupt-controller/arm-gic.h>
111 compatible = "renesas,r9a07g044-csi2", "renesas,rzg2l-csi2";
117 clock-names = "system", "video", "apb";
118 power-domains = <&cpg>;
121 reset-names = "presetn", "cmn-rstb";
124 #address-cells = <1>;
125 #size-cells = <0>;
131 clock-lanes = <0>;
132 data-lanes = <1 2>;
133 remote-endpoint = <&ov5645_ep>;
138 #address-cells = <1>;
139 #size-cells = <0>;
145 remote-endpoint = <&crucsi2>;