bindings/media/renesas%2Cfdp1.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Fine Display Processor (FDP1)
10   - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13   The FDP1 is a de-interlacing module which converts interlaced video to
21       - renesas,fdp1
32   power-domains:
42       Not allowed on R-Car Gen2, mandatory on R-Car Gen3.
45   - compatible
46   - reg
47   - interrupts
48   - clocks
49   - power-domains
50   - resets
55   - |
56     #include <dt-bindings/clock/renesas-cpg-mssr.h>
57     #include <dt-bindings/interrupt-controller/arm-gic.h>
58     #include <dt-bindings/power/r8a7795-sysc.h>
64         clocks = <&cpg CPG_MOD 119>;
65         power-domains = <&sysc R8A7795_PD_A3VP>;
66         resets = <&cpg 119>;