bindings/interrupt-controller/intel%2Cce4100-ioapic.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Rahul Tanwar <rtanwar@maxlinear.com>
15   architecture design, with a local component (LAPIC) integrated
17   (lapic) receives interrupts from the processor's interrupt pins,
22   Many of the Intel's generic devices like hpet, ioapic, lapic have
23   the ce4100 name in their compatible property names because they
24   first appeared in CE4100 SoC.
28   [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
32     const: intel,ce4100-ioapic
37   interrupt-controller: true
39   '#interrupt-cells':
46   - compatible
47   - reg
48   - interrupt-controller
49   - '#interrupt-cells'
54   - |
55     ioapic1: interrupt-controller@fec00000 {
56         compatible = "intel,ce4100-ioapic";
58         interrupt-controller;
59         #interrupt-cells = <2>;