Lines Matching +full:sdm845 +full:- +full:llcc
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
16 Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
17 - Measuring the bandwidth between CPUs and Last Level Cache Controller -
19 - Measuring the bandwidth between Last Level Cache Controller and memory
20 (DDR) - called LLCC BWMON.
25 - const: qcom,msm8998-bwmon # BWMON v4
26 - items:
27 - enum:
28 - qcom,sc7180-cpu-bwmon
29 - qcom,sc7280-cpu-bwmon
30 - qcom,sc8280xp-cpu-bwmon
31 - qcom,sdm845-cpu-bwmon
32 - qcom,sm6350-llcc-bwmon
33 - qcom,sm8250-cpu-bwmon
34 - qcom,sm8550-cpu-bwmon
35 - const: qcom,sdm845-bwmon # BWMON v4, unified register space
36 - items:
37 - enum:
38 - qcom,sc7180-llcc-bwmon
39 - qcom,sc8280xp-llcc-bwmon
40 - qcom,sm6350-cpu-bwmon
41 - qcom,sm8250-llcc-bwmon
42 - qcom,sm8550-llcc-bwmon
43 - const: qcom,sc7280-llcc-bwmon
44 - const: qcom,sc7280-llcc-bwmon # BWMON v5
45 - const: qcom,sdm845-llcc-bwmon # BWMON v5
53 operating-points-v2: true
54 opp-table:
58 # BWMON v5 uses one register address space, v1-v4 use one or two.
62 reg-names:
67 - compatible
68 - interconnects
69 - interrupts
70 - operating-points-v2
71 - opp-table
72 - reg
77 - if:
80 const: qcom,msm8998-bwmon
86 reg-names:
88 - const: monitor
89 - const: global
96 reg-names:
100 - |
101 #include <dt-bindings/interconnect/qcom,sdm845.h>
102 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";
110 operating-points-v2 = <&cpu_bwmon_opp_table>;
112 cpu_bwmon_opp_table: opp-table {
113 compatible = "operating-points-v2";
114 opp-0 {
115 opp-peak-kBps = <4800000>;
117 opp-1 {
118 opp-peak-kBps = <9216000>;
120 opp-2 {
121 opp-peak-kBps = <15052800>;
123 opp-3 {
124 opp-peak-kBps = <20889600>;
126 opp-4 {
127 opp-peak-kBps = <25497600>;