iio/imu/adi%2Cadis16480.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Alexandru Tachici <alexandru.tachici@analog.com>
15       - adi,adis16375
16       - adi,adis16480
17       - adi,adis16485
18       - adi,adis16488
19       - adi,adis16490
20       - adi,adis16495-1
21       - adi,adis16495-2
22       - adi,adis16495-3
23       - adi,adis16497-1
24       - adi,adis16497-2
25       - adi,adis16497-3
38   interrupt-names:
45         - DIO1
46         - DIO2
47         - DIO3
48         - DIO4
50   spi-cpha: true
51   spi-cpol: true
53   reset-gpios:
61   clock-names:
63       sync: In sync mode, the internal clock is disabled and the frequency
65             collection and processing. See Fig 14 and 15 in the datasheet.
66             The clock-frequency must be:
69       pps:  In Pulse Per Second (PPS) Mode, the rate of data collection and
71             frequency and the scale factor in the SYNC_SCALE register, see
72             Table 154 in the datasheet.
73             The clock-frequency must be:
77       - sync
78       - pps
80   adi,ext-clk-pin:
92       - DIO1
93       - DIO2
94       - DIO3
95       - DIO4
98   - compatible
99   - reg
100   - interrupts
101   - spi-cpha
102   - spi-cpol
103   - spi-max-frequency
106   - $ref: /schemas/spi/spi-peripheral-props.yaml#
111   - |
112     #include <dt-bindings/interrupt-controller/irq.h>
114         #address-cells = <1>;
115         #size-cells = <0>;
118             compatible = "adi,adis16495-1";
120             spi-max-frequency = <3200000>;
121             spi-cpol;
122             spi-cpha;
124             interrupt-parent = <&gpio>;
125             interrupt-names = "DIO2";
127             clock-names = "sync";
128             adi,ext-clk-pin = "DIO1";