Lines Matching +full:refin2 +full:- +full:pins +full:- +full:enable
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Michael Hennerich <michael.hennerich@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
21 - adi,ad7190
22 - adi,ad7192
23 - adi,ad7193
24 - adi,ad7195
29 spi-cpol: true
31 spi-cpha: true
37 clock-names:
39 - const: mclk
44 dvdd-supply:
47 avdd-supply:
50 vref-supply:
53 adi,rejection-60-Hz-enable:
61 adi,refin2-pins-enable:
63 External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins.
66 adi,buffer-enable:
75 adi,burnout-currents-enable:
88 - compatible
89 - reg
90 - clocks
91 - clock-names
92 - interrupts
93 - dvdd-supply
94 - avdd-supply
95 - vref-supply
96 - spi-cpol
97 - spi-cpha
100 - $ref: /schemas/spi/spi-peripheral-props.yaml#
105 - |
107 #address-cells = <1>;
108 #size-cells = <0>;
113 spi-max-frequency = <1000000>;
114 spi-cpol;
115 spi-cpha;
117 clock-names = "mclk";
119 interrupt-parent = <&gpio>;
120 dvdd-supply = <&dvdd>;
121 avdd-supply = <&avdd>;
122 vref-supply = <&vref>;
124 adi,refin2-pins-enable;
125 adi,rejection-60-Hz-enable;
126 adi,buffer-enable;
127 adi,burnout-currents-enable;