bindings/i2c/qcom%2Ci2c-cci.yaml

1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Loic Poulain <loic.poulain@linaro.org>
11   - Robert Foss <robert.foss@linaro.org>
16       - enum:
17           - qcom,msm8226-cci
18           - qcom,msm8974-cci
19           - qcom,msm8996-cci
21       - items:
22           - enum:
23               - qcom,msm8916-cci
24           - const: qcom,msm8226-cci # CCI v1
26       - items:
27           - enum:
28               - qcom,sdm845-cci
29               - qcom,sm6350-cci
30               - qcom,sm8250-cci
31               - qcom,sm8450-cci
32           - const: qcom,msm8996-cci # CCI v2
34   "#address-cells":
37   "#size-cells":
44   clock-names:
51   power-domains:
58   "^i2c-bus@[01]$":
59     $ref: /schemas/i2c/i2c-controller.yaml#
66       clock-frequency:
70   - compatible
71   - clock-names
72   - clocks
73   - interrupts
74   - reg
77   - if:
82               - qcom,msm8996-cci
85         - power-domains
87   - if:
92               - qcom,msm8226-cci
93               - qcom,msm8916-cci
96         i2c-bus@1: false
98   - if:
102             - contains:
104                   - qcom,msm8974-cci
106             - const: qcom,msm8226-cci
111         clock-names:
113             - const: camss_top_ahb
114             - const: cci_ahb
115             - const: cci
117   - if:
121             - contains:
123                   - qcom,msm8916-cci
125             - const: qcom,msm8996-cci
130         clock-names:
132             - const: camss_top_ahb
133             - const: cci_ahb
134             - const: cci
135             - const: camss_ahb
137   - if:
142               - qcom,sdm845-cci
143               - qcom,sm6350-cci
148         clock-names:
150             - const: camnoc_axi
151             - const: soc_ahb
152             - const: slow_ahb_src
153             - const: cpas_ahb
154             - const: cci
155             - const: cci_src
157   - if:
162               - qcom,sm8250-cci
163               - qcom,sm8450-cci
169         clock-names:
171             - const: camnoc_axi
172             - const: slow_ahb_src
173             - const: cpas_ahb
174             - const: cci
175             - const: cci_src
180   - |
181     #include <dt-bindings/clock/qcom,camcc-sdm845.h>
182     #include <dt-bindings/gpio/gpio.h>
183     #include <dt-bindings/interrupt-controller/arm-gic.h>
187         compatible = "qcom,sdm845-cci", "qcom,msm8996-cci";
188         #address-cells = <1>;
189         #size-cells = <0>;
192         power-domains = <&clock_camcc TITAN_TOP_GDSC>;
200         clock-names = "camnoc_axi",
207         assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
209         assigned-clock-rates = <80000000>,
212         pinctrl-names = "default", "sleep";
213         pinctrl-0 = <&cci0_default &cci1_default>;
214         pinctrl-1 = <&cci0_sleep &cci1_sleep>;
216         i2c-bus@0 {
218             clock-frequency = <1000000>;
219             #address-cells = <1>;
220             #size-cells = <0>;
226                 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
227                 pinctrl-names = "default";
228                 pinctrl-0 = <&cam0_default>;
231                 clock-names = "xvclk";
232                 clock-frequency = <19200000>;
234                 dovdd-supply = <&vreg_lvs1a_1p8>;
235                 avdd-supply = <&cam0_avdd_2v8>;
236                 dvdd-supply = <&cam0_dvdd_1v2>;
240                         link-frequencies = /bits/ 64 <360000000 180000000>;
241                         data-lanes = <1 2 3 4>;
242                         remote-endpoint = <&csiphy0_ep>;
248         cci_i2c1: i2c-bus@1 {
250             clock-frequency = <1000000>;
251             #address-cells = <1>;
252             #size-cells = <0>;
258                 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
259                 pinctrl-names = "default";
260                 pinctrl-0 = <&cam3_default>;
263                 clock-names = "xclk";
264                 clock-frequency = <24000000>;
266                 vdddo-supply = <&vreg_lvs1a_1p8>;
267                 vdda-supply = <&cam3_avdd_2v8>;
271                         data-lanes = <0 1>;
272                         link-frequencies = /bits/ 64 <240000000 319200000>;
273                         remote-endpoint = <&csiphy3_ep>;