bindings/dma/qcom%2Cadm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Christian Marangi <ansuelsmth@gmail.com>
11   - Bjorn Andersson <bjorn.andersson@linaro.org>
27   "#dma-cells":
32       - description: phandle to the core clock
33       - description: phandle to the iface clock
35   clock-names:
37       - const: core
38       - const: iface
42       - description: phandle to the clk reset
43       - description: phandle to the pbus reset
44       - description: phandle to the c0 reset
45       - description: phandle to the c1 reset
46       - description: phandle to the c2 reset
48   reset-names:
50       - const: clk
51       - const: pbus
52       - const: c0
53       - const: c1
54       - const: c2
63   - compatible
64   - reg
65   - interrupts
66   - "#dma-cells"
67   - clocks
68   - clock-names
69   - resets
70   - reset-names
71   - qcom,ee
76   - |
77     #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
78     #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
80     adm_dma: dma-controller@18300000 {
84         #dma-cells = <1>;
86         clocks = <&gcc ADM0_CLK>,
87                   <&gcc ADM0_PBUS_CLK>;
88         clock-names = "core", "iface";
90         resets = <&gcc ADM0_RESET>,
91                   <&gcc ADM0_PBUS_RESET>,
92                   <&gcc ADM0_C0_RESET>,
93                   <&gcc ADM0_C1_RESET>,
94                   <&gcc ADM0_C2_RESET>;
95         reset-names = "clk", "pbus", "c0", "c1", "c2";