Lines Matching +full:0 +full:x0ae94600

47   "^display-controller@[0-9a-f]+$":
53   "^dsi@[0-9a-f]+$":
61   "^phy@[0-9a-f]+$":
83         reg = <0x0ae00000 0x1000>;
102         iommus = <&apps_smmu 0x820 0x402>;
110             reg = <0x0ae01000 0x8f000>,
111                   <0x0aeb0000 0x2008>;
127             interrupts = <0>;
131                 #size-cells = <0>;
133                 port@0 {
134                     reg = <0>;
175             reg = <0x0ae94000 0x400>;
196             assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
205             #size-cells = <0>;
209                 #size-cells = <0>;
211                 port@0 {
212                     reg = <0>;
247             reg = <0x0ae94400 0x200>,
248                   <0x0ae94600 0x280>,
249                   <0x0ae94900 0x260>;
255             #phy-cells = <0>;
265             reg = <0x0ae96000 0x400>;
286             assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
295             #size-cells = <0>;
299                 #size-cells = <0>;
301                 port@0 {
302                     reg = <0>;
318             reg = <0x0ae96400 0x200>,
319                   <0x0ae96600 0x280>,
320                   <0x0ae96900 0x260>;
326             #phy-cells = <0>;