Lines Matching +full:0 +full:x8f000

33   "^display-controller@[0-9a-f]+$":
39   "^dsi@[0-9a-f]+$":
51   "^phy@[0-9a-f]+$":
74         reg = <0x05e00000 0x1000>;
85         iommus = <&apps_smmu 0x420 0x2>,
86                  <&apps_smmu 0x421 0x0>;
91             reg = <0x05e01000 0x8f000>,
92                   <0x05eb0000 0x2008>;
107             interrupts = <0>;
111                 #size-cells = <0>;
113                 port@0 {
114                     reg = <0>;
124             reg = <0x05e94000 0x400>;
143             assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
150             #size-cells = <0>;
154                 #size-cells = <0>;
156                 port@0 {
157                     reg = <0>;
173             reg = <0x05e94400 0x100>,
174                   <0x05e94500 0x300>,
175                   <0x05e94800 0x188>;
181             #phy-cells = <0>;