Lines Matching +full:0 +full:x8f000

45   "^display-controller@[0-9a-f]+$":
51   "^dsi@[0-9a-f]+$":
57   "^phy@[0-9a-f]+$":
81         reg = <0x05e00000 0x1000>;
96         iommus = <&apps_smmu 0x420 0x2>,
97                  <&apps_smmu 0x421 0x0>;
102             reg = <0x05e01000 0x8f000>,
103                   <0x05eb0000 0x2008>;
117             interrupts = <0>;
121                 #size-cells = <0>;
123                 port@0 {
124                     reg = <0>;
134             reg = <0x05e94000 0x400>;
153             assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
162             #size-cells = <0>;
166                 #size-cells = <0>;
168                 port@0 {
169                     reg = <0>;
185             reg = <0x05e94400 0x100>,
186                   <0x05e94500 0x300>,
187                   <0x05e94800 0x188>;
193             #phy-cells = <0>;