display/msm/dsi-phy-7nm.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI 7nm PHY
10   - Jonathan Marek <jonathan@marek.ca>
13   - $ref: dsi-phy-common.yaml#
18       - qcom,dsi-phy-7nm
19       - qcom,dsi-phy-7nm-8150
20       - qcom,sc7280-dsi-phy-7nm
21       - qcom,sm6375-dsi-phy-7nm
22       - qcom,sm8350-dsi-phy-5nm
23       - qcom,sm8450-dsi-phy-5nm
24       - qcom,sm8550-dsi-phy-4nm
28       - description: dsi phy register set
29       - description: dsi phy lane register set
30       - description: dsi pll register set
32   reg-names:
34       - const: dsi_phy
35       - const: dsi_phy_lane
36       - const: dsi_pll
38   vdds-supply:
42   phy-type:
43     description: D-PHY (default) or C-PHY mode
44     enum: [ 10, 11 ]
45     default: 10
48   - compatible
49   - reg
50   - reg-names
55   - |
56      #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
57      #include <dt-bindings/clock/qcom,rpmh.h>
59      dsi-phy@ae94400 {
60          compatible = "qcom,dsi-phy-7nm";
64          reg-names = "dsi_phy",
68          #clock-cells = <1>;
69          #phy-cells = <0>;
71          vdds-supply = <&vreg_l5a_0p88>;
74          clock-names = "iface", "ref";