display/msm/dsi-phy-28nm.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI 28nm PHY
10   - Krishna Manikandan <quic_mkrishn@quicinc.com>
13   - $ref: dsi-phy-common.yaml#
18       - qcom,dsi-phy-28nm-8226
19       - qcom,dsi-phy-28nm-8960
20       - qcom,dsi-phy-28nm-hpm
21       - qcom,dsi-phy-28nm-hpm-fam-b
22       - qcom,dsi-phy-28nm-lp
26       - description: dsi pll register set
27       - description: dsi phy register set
28       - description: dsi phy regulator register set
30   reg-names:
32       - const: dsi_pll
33       - const: dsi_phy
34       - const: dsi_phy_regulator
36   vddio-supply:
37     description: Phandle to vdd-io regulator device node.
39   qcom,dsi-phy-regulator-ldo-mode:
41     description: Indicates if the LDO mode PHY regulator is wanted.
44   - compatible
45   - reg
46   - reg-names
47   - vddio-supply
52   - |
53      #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
54      #include <dt-bindings/clock/qcom,rpmh.h>
56      dsi-phy@fd922a00 {
57          compatible = "qcom,dsi-phy-28nm-lp";
61          reg-names = "dsi_pll",
65          #clock-cells = <1>;
66          #phy-cells = <0>;
68          vddio-supply = <&vddio_reg>;
72          clock-names = "iface", "ref";