Lines Matching +full:0 +full:xae90400

71       - description: phy 0 parent
101     const: 0
103   vdda-0p9-supply:
111       port@0:
127                   enum: [ 0, 1, 2, 3 ]
136       - port@0
183         reg = <0xae90000 0x200>,
184               <0xae90200 0x200>,
185               <0xae90400 0xc00>,
186               <0xae91000 0x400>,
187               <0xae91400 0x400>;
202         assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
207         #sound-dai-cells = <0>;
213             #size-cells = <0>;
215             port@0 {
216                 reg = <0>;
226                     data-lanes = <0 1>;