display/mediatek/mediatek%2Covl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11   - Philipp Zabel <p.zabel@pengutronix.de>
24       - enum:
25           - mediatek,mt2701-disp-ovl
26           - mediatek,mt8173-disp-ovl
27           - mediatek,mt8183-disp-ovl
28           - mediatek,mt8192-disp-ovl
29       - items:
30           - enum:
31               - mediatek,mt7623-disp-ovl
32               - mediatek,mt2712-disp-ovl
33           - const: mediatek,mt2701-disp-ovl
34       - items:
35           - enum:
36               - mediatek,mt6795-disp-ovl
37           - const: mediatek,mt8173-disp-ovl
38       - items:
39           - enum:
40               - mediatek,mt8188-disp-ovl
41               - mediatek,mt8195-disp-ovl
42           - const: mediatek,mt8183-disp-ovl
43       - items:
44           - enum:
45               - mediatek,mt8186-disp-ovl
46           - const: mediatek,mt8192-disp-ovl
54   power-domains:
57       Documentation/devicetree/bindings/power/power-domain.yaml for details.
61       - description: OVL Clock
65       This property should point to the respective IOMMU block with master port as argument,
68   mediatek,gce-client-reg:
72       defined in the header include/dt-bindings/gce/<chip>-gce.h.
73     $ref: /schemas/types.yaml#/definitions/phandle-array
77   - compatible
78   - reg
79   - interrupts
80   - power-domains
81   - clocks
82   - iommus
87   - |
88     #include <dt-bindings/interrupt-controller/arm-gic.h>
89     #include <dt-bindings/clock/mt8173-clk.h>
90     #include <dt-bindings/power/mt8173-power.h>
91     #include <dt-bindings/gce/mt8173-gce.h>
92     #include <dt-bindings/memory/mt8173-larb-port.h>
95         #address-cells = <2>;
96         #size-cells = <2>;
99             compatible = "mediatek,mt8173-disp-ovl";
102             power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
105             mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;