Lines Matching +full:0 +full:xfeb90000

56       port@0:
65       - port@0
112             - dclkin.0
116             - dclkin.0
120             - dclkin.0
147         reg = <0xfeb90000 0x14>;
154             #size-cells = <0>;
156             port@0 {
157                 reg = <0>;
177         reg = <0xfeb90000 0x20>;
181         clock-names = "fck", "dclkin.0", "extal";
189             #size-cells = <0>;
191             port@0 {
192                 reg = <0>;
208         reg = <0xfeb90100 0x20>;
212         clock-names = "fck", "dclkin.0", "extal";
218             #size-cells = <0>;
220             port@0 {
221                 reg = <0>;