bindings/display/arm%2Cpl11x.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm PrimeCell Color LCD Controller PL110/PL111
10   - Liviu Dudau <Liviu.Dudau@arm.com>
11   - Andre Przywara <andre.przywara@arm.com>
14   The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out
16   a variety of LCD panels.
24           - arm,pl110
25           - arm,pl111
27     - compatible
32       - enum:
33           - arm,pl110
34           - arm,pl111
35       - const: arm,primecell
40   interrupt-names:
42       - const: combined
47       - items:
48           - const: mbe        # CLCDMBEINTR
49           - const: vcomp      # CLCDVCOMPINTR
50           - const: lnbu       # CLCDLNBUINTR
51           - const: fuf        # CLCDFUFINTR
57   clock-names:
59       - const: clcdclk
60       - const: apb_pclk
64       - description: The CLCDCLK reference clock for the controller.
65       - description: The HCLK AHB slave clock for the register access.
67   memory-region:
73   max-memory-bandwidth:
82     $ref: /schemas/graph.yaml#/$defs/port-base
86       Output endpoint of the controller, connecting the LCD panel signals.
90         $ref: /schemas/graph.yaml#/$defs/endpoint-base
94           arm,pl11x,tft-r0g0b0-pads:
95             $ref: /schemas/types.yaml#/definitions/uint32-array
97               - description: index of CLD pad used for first red bit (R0)
98               - description: index of CLD pad used for first green bit (G0)
99               - description: index of CLD pad used for first blue bit (G0)
102               DEPRECATED. An array of three 32-bit values, defining the way
107               See also "LCD panel signal multiplexing details" paragraphs in the
110               - PL111 TFT 4:4:4 panel:
111                   arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
112               - PL110 TFT (1:)5:5:5 panel:
113                   arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
114               - PL111 TFT (1:)5:5:5 panel:
115                   arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
116               - PL111 TFT 5:6:5 panel:
117                   arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
118               - PL110 and PL111 TFT 8:8:8 panel:
119                   arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
120               - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
121                   arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
126   - compatible
127   - reg
128   - clock-names
129   - clocks
130   - port
133   - if:
138         - interrupts
141         - interrupt-names
144   - |
148         interrupt-names = "combined";
151         clock-names = "clcdclk", "apb_pclk";
152         max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
156                 remote-endpoint = <&clcd_panel>;
162         compatible = "arm,rtsm-display";
166                 remote-endpoint = <&clcd_pads>;