bindings/clock/xlnx%2Cversal-clk.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/xlnx,versal-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Michal Simek <michal.simek@amd.com>
20       - enum:
21           - xlnx,versal-clk
22           - xlnx,zynqmp-clk
23       - items:
24           - enum:
25               - xlnx,versal-net-clk
26           - const: xlnx,versal-clk
28   "#clock-cells":
37   clock-names:
42   - compatible
43   - "#clock-cells"
44   - clocks
45   - clock-names
50   - if:
55               - xlnx,versal-clk
61             - description: reference clock
62             - description: alternate reference clock
63             - description: alternate reference clock for programmable logic
65         clock-names:
67             - const: ref
68             - const: alt_ref
69             - const: pl_alt_ref
71   - if:
76               - xlnx,zynqmp-clk
83             - description: PS reference clock
84             - description: reference clock for video system
85             - description: alternative PS reference clock
86             - description: auxiliary reference clock
87             - description: transceiver reference clock
88             - description: (E)MIO clock source  (Optional clock)
89             - description: GEM emio clock  (Optional clock)
90             - description: Watchdog external clock (Optional clock)
92         clock-names:
95             - const: pss_ref_clk
96             - const: video_clk
97             - const: pss_alt_ref_clk
98             - const: aux_ref_clk
99             - const: gt_crx_ref_clk
100             - pattern: "^mio_clk[00-77]+.*$"
101             - pattern: "gem[0-3]+_emio_clk.*$"
102             - pattern: "swdt[0-1]+_ext_clk.*$"
105   - |
106     firmware {
107       zynqmp_firmware: zynqmp-firmware {
108         compatible = "xlnx,zynqmp-firmware";
110         versal_clk: clock-controller {
111           #clock-cells = <1>;
112           compatible = "xlnx,versal-clk";
114           clock-names = "ref", "alt_ref", "pl_alt_ref";
119     clock-controller {
120         #clock-cells = <1>;
121         compatible = "xlnx,zynqmp-clk";
124         clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk",