Lines Matching refs:output
7 The Si5351a/b/c are programmable i2c clock generators with up to 8 output
9 3 output clocks are accessible. The internal structure of the clock
37 output is not set, the eeprom configuration is not overwritten.
40 - reg: number of clock output.
43 - silabs,clock-source: source clock of the output divider stage N, shall be
45 1 = multisynth 0 for output clocks 0-3, else multisynth4
48 - silabs,drive-strength: output drive strength in mA, shall be one of {2,4,6,8}.
52 - silabs,pll-reset: boolean, clock output can reset its pll.
53 - silabs,disable-state : clock output disable state, shall be
54 0 = clock output is driven LOW when disabled
55 1 = clock output is driven HIGH when disabled
56 2 = clock output is FLOATING (HIGH-Z) when disabled
57 3 = clock output is NEVER disabled
87 * - 8mA output drive strength
89 * - multisynth0 as clock source of output divider
104 * - 4mA output drive strength
106 * - multisynth1 as clock source of output divider
119 * - xtal as clock source of output divider