Lines Matching full:cmu_top

23   CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24   dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
88             - description: CMU_APM bus clock (from CMU_TOP)
106             - description: AUD clock (from CMU_TOP)
142             - description: CMU_CORE bus clock (from CMU_TOP)
143             - description: CCI clock (from CMU_TOP)
144             - description: eMMC clock (from CMU_TOP)
145             - description: SSS clock (from CMU_TOP)
166             - description: DPU clock (from CMU_TOP)
184             - description: G3D clock (from CMU_TOP)
203             - description: CMU_HSI bus clock (from CMU_TOP)
204             - description: SD card clock (from CMU_TOP)
205             - description: USB 2.0 DRD clock (from CMU_TOP)
226             - description: CMU_IS bus clock (from CMU_TOP)
227             - description: Image Texture Processing core clock (from CMU_TOP)
228             - description: Visual Recognition Accelerator clock (from CMU_TOP)
229             - description: Geometric Distortion Correction clock (from CMU_TOP)
250             - description: Multi-Format Codec clock (from CMU_TOP)
251             - description: Memory to Memory Scaler clock (from CMU_TOP)
252             - description: Multi-Channel Scaler clock (from CMU_TOP)
253             - description: JPEG codec clock (from CMU_TOP)
274             - description: CMU_PERI bus clock (from CMU_TOP)
275             - description: UART clock (from CMU_TOP)
276             - description: Parent clock for HSI2C and SPI (from CMU_TOP)
304         clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,
305                  <&cmu_top CLK_DOUT_PERI_UART>,
306                  <&cmu_top CLK_DOUT_PERI_IP>;