bindings/clock/rockchip%2Crk3328-cru.txt

1 * Rockchip RK3328 Clock and Reset Unit
3 The RK3328 clock controller generates and supplies clock to various
4 controllers within the SoC and also implements a reset controller for SoC
9 - compatible: should be "rockchip,rk3328-cru"
10 - reg: physical base address of the controller and length of memory mapped
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
17 - rockchip,grf: phandle to the syscon managing the "general register files"
20 Each clock is assigned an identifier and client nodes can use this identifier
21 to specify the clock which they consume. All available clocks are defined as
22 preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be
29 that they are defined using standard clock bindings with following
30 clock-output-names:
31  - "xin24m" - crystal input - required,
32  - "clkin_i2s" - external I2S clock - optional,
33  - "gmac_clkin" - external GMAC clock - optional
34  - "phy_50m_out" - output clock of the pll in the mac phy
35  - "hdmi_phy" - output clock of the hdmi phy pll - optional
37 Example: Clock controller node:
39 	cru: clock-controller@ff440000 {
40 		compatible = "rockchip,rk3328-cru";
44 		#clock-cells = <1>;
45 		#reset-cells = <1>;
48 Example: UART controller node that consumes the clock generated by the clock
49   controller:
52 		compatible = "snps,dw-apb-uart";
55 		reg-shift = <2>;
56 		reg-io-width = <4>;